Tsai, You-Jan:A New Issue Logic of Computer
- Taschenbuch 2009, ISBN: 9783639139860
[ED: Softcover], [PU: VDM Verlag Dr. Müller], In order to enhance the performance of a computer,
most modern processors use superscalar architecture
and raise the clock frequency. Super… Mehr…
[ED: Softcover], [PU: VDM Verlag Dr. Müller], In order to enhance the performance of a computer,
most modern processors use superscalar architecture
and raise the clock frequency. Superscalar
architecture can execute more than one instruction
per each cycle. The amount of instruction level
parallelism will become more and more important when
superscalar issue is increased. In some schemes [6,
14], instructions can be speculatively waked up. The
more instructions are waked up, the more ILP is
exploited, hence IPC is increased. We can adopt the
speculative aspect to wakeup more instructions. But
the ILP is still limited by the true data dependency.
In this paper proposed the speculative wakeup logic
with value prediction mechanism to overcome the data
dependency that will exploit instruction level
parallelism. And in order to reduce the recovery
frequency, we also propose the priority base select
logic with two bit counter. In our experiment, our
model will enhance 18.02% performance.
2009. 52 S.
Versandfertig in 6-10 Tagen, DE, [SC: 0.00], Neuware, gewerbliches Angebot, Offene Rechnung (Vorkasse vorbehalten)<
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You-Jan Tsai:A New Issue Logic of Computer : Speculative Issue Logic
- Taschenbuch 2009, ISBN: 3639139860
[EAN: 9783639139860], Neubuch, [PU: VDM Verlag Dr. Müller], nach der Bestellung gedruckt Neuware - Printed after ordering - In order to enhance the performance of a computer, most modern … Mehr…
[EAN: 9783639139860], Neubuch, [PU: VDM Verlag Dr. Müller], nach der Bestellung gedruckt Neuware - Printed after ordering - In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than one instruction per each cycle. The amount of instruction level parallelism will become more and more important when superscalar issue is increased. In some schemes [6, 14], instructions can be speculatively waked up. The more instructions are waked up, the more ILP is exploited, hence IPC is increased. We can adopt the speculative aspect to wakeup more instructions. But the ILP is still limited by the true data dependency.In this paper proposed the speculative wakeup logic with value prediction mechanism to overcome the data dependency that will exploit instruction level parallelism. And in order to reduce the recovery frequency, we also propose the priority base select logic with two bit counter. In our experiment, our model will enhance 18.02% performance. 52 pp. Englisch, Books<
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(*) Derzeit vergriffen bedeutet, dass dieser Titel momentan auf keiner der angeschlossenen Plattform verfügbar ist.
Tsai, You-Jan:A New Issue Logic of Computer
- Taschenbuch 2009, ISBN: 9783639139860
[ED: Softcover], [PU: VDM Verlag Dr. Müller], In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Supersc… Mehr…
[ED: Softcover], [PU: VDM Verlag Dr. Müller], In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than one instruction per each cycle. The amount of instruction level parallelism will become more and more important when superscalar issue is increased. In some schemes [6, 14], instructions can be speculatively waked up. The more instructions are waked up, the more ILP is exploited, hence IPC is increased. We can adopt the speculative aspect to wakeup more instructions. But the ILP is still limited by the true data dependency. In this paper proposed the speculative wakeup logic with value prediction mechanism to overcome the data dependency that will exploit instruction level parallelism. And in order to reduce the recovery frequency, we also propose the priority base select logic with two bit counter. In our experiment, our model will enhance 18.02% performance.
2009. 52 S.
Sofort lieferbar, DE, [SC: 0.00], Neuware, gewerbliches Angebot, Offene Rechnung (Vorkasse vorbehalten)<
| | booklooker.debuecher.de GmbH & Co. KG Versandkosten:Versandkostenfrei, Versand nach Deutschland. (EUR 0.00) Details... |
(*) Derzeit vergriffen bedeutet, dass dieser Titel momentan auf keiner der angeschlossenen Plattform verfügbar ist.
You-Jan Tsai:A New Issue Logic of Computer
- Taschenbuch 2009, ISBN: 3639139860
[EAN: 9783639139860], Neubuch, [PU: VDM Verlag Dr. Müller], This item is printed on demand - it takes 3-4 days longer - Neuware -In order to enhance the performance of a computer, most mo… Mehr…
[EAN: 9783639139860], Neubuch, [PU: VDM Verlag Dr. Müller], This item is printed on demand - it takes 3-4 days longer - Neuware -In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than one instruction per each cycle. The amount of instruction level parallelism will become more and more important when superscalar issue is increased. In some schemes [6, 14], instructions can be speculatively waked up. The more instructions are waked up, the more ILP is exploited, hence IPC is increased. We can adopt the speculative aspect to wakeup more instructions. But the ILP is still limited by the true data dependency.In this paper proposed the speculative wakeup logic with value prediction mechanism to overcome the data dependency that will exploit instruction level parallelism. And in order to reduce the recovery frequency, we also propose the priority base select logic with two bit counter. In our experiment, our model will enhance 18.02% performance. 52 pp. Englisch, Books<
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You-Jan Tsai:A New Issue Logic of Computer : Speculative Issue Logic
- Taschenbuch 2009, ISBN: 3639139860
[EAN: 9783639139860], Neubuch, [SC: 0.0], [PU: VDM Verlag Dr. Müller], Druck auf Anfrage Neuware - In order to enhance the performance of a computer, most modern processors use superscala… Mehr…
[EAN: 9783639139860], Neubuch, [SC: 0.0], [PU: VDM Verlag Dr. Müller], Druck auf Anfrage Neuware - In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than one instruction per each cycle. The amount of instruction level parallelism will become more and more important when superscalar issue is increased. In some schemes [6, 14], instructions can be speculatively waked up. The more instructions are waked up, the more ILP is exploited, hence IPC is increased. We can adopt the speculative aspect to wakeup more instructions. But the ILP is still limited by the true data dependency. In this paper proposed the speculative wakeup logic with value prediction mechanism to overcome the data dependency that will exploit instruction level parallelism. And in order to reduce the recovery frequency, we also propose the priority base select logic with two bit counter. In our experiment, our model will enhance 18.02% performance. 52 pp. Englisch, Books<
| | ZVAB.comAHA-BUCH GmbH, Einbeck, Germany [51283250] [Rating: 5 (von 5)] NEW BOOK. Versandkosten:Versandkostenfrei. (EUR 0.00) Details... |
(*) Derzeit vergriffen bedeutet, dass dieser Titel momentan auf keiner der angeschlossenen Plattform verfügbar ist.