2047, ISBN: 9787115113450
paperback. New. Ship out in 2 business day, And Fast shipping, Free Tracking number will be provided after the shipment.Pages Number: 348 Publisher: Beijing University of Aeronautics Pub… Mehr…
paperback. New. Ship out in 2 business day, And Fast shipping, Free Tracking number will be provided after the shipment.Pages Number: 348 Publisher: Beijing University of Aeronautics Pub. Date :2006-08-01 version 1. 8051 MCU is popular for many years on behalf of the international models. is the first choice of university teaching and Beginners mainstream models. also in a variety of technical journals and professional books in the highest frequency of the classic models. Book for teaching the standard 80C51 model. and an appropriate balance between the common and popular 8051 model features. Contents include: hardware architecture. ROM. RAM. instruction set. assembly language and assembler based tool chain. parallel ports. timers. interrupt logic. reset logic. clock circuits. power circuits and other features of the structure and working principle of the circuit. and on-chip program memory programming principles. Outstanding features: new ideas. easy to understand. language fluency. step by step. detailed content. the system comprehensive. learning to use both. results-oriented. experience coaching. resolving doubts and confusion. renewal. Suitable for the relevant professional specialist college students. undergraduate textbooks or reference books. can be used as scientific research. production and maintenance technician training book. Contents: Chapter 0 Introduction 0.1 Background knowledge and discipline necessary to learn what SCM SCM 10.2 What is the reason fascinating to learn microcontroller 30.3 50.4 What is the significance single-chip microcontroller in the end is what use 70.5 90.6 100.7 51 What are the characteristics MCU MCU What is the background of development 110.7.1 MCS-48 series MCU Introduction 110.7.2 MCS-51 series 51 series single-chip microcontroller Overview 110.7.3 Introduction 140.7.4 51 series 51 series of conventional naming 160.7.5 170.7 microcontroller programming method more .6 the performance characteristics of the standard 8051 170.8 51 computers to learn what are the advantages 180.8.1 180.8.2 advantage of information technology's advantages 190.8.3 hardware advantages 190.8.4 200.8.5 software advantage software tool chain advantages 200.8.6 hardware tool chain advantages 210.9 specialized terminology and technical terms 210.9.1 220.9.2 hardware jargon jargon 250.10 software book writing ideas and thinking and practice writing goals 26 28 1 Chapter Overview 1.1 hardware standard 80C51 chip core area within the overall structure of the 291.1.1 cell circuit and its functions 321.1.2 321.1.3 central processing unit and functional features and functionality 361.2 361.1.4 chip peripheral modules and the external package pins package 371.2.2 371.2.1 391.2.3 pin function pin function to simplify the organization of 421.4 401.3 memory program memory (ROM) 431.5 Data Memory (RAM) 451.5.1 451.5.2 external data memory space internal data memory space is 461.5. 3 The concept of stack stack 481.5.3.1 481.5.3.2 481.5.3.3 uses the stack stack stack operations structure 481.5.3.4 491.5.3.5 Notes 501.6 Special Function Register (SFR) space 501.6.1 SFR layout and configuration 511.6.2 Boolean function of 531.7 SFR processor (bit processor) 54 55 thinking and exercise instruction Chapter 2 Classification 80C51 2.1 80C51 instruction parsing instructions describe methods outlined 572.1.1 582.1.2 592.1.3 instruction execution sequence encoding instructions format addressing 622.2.1 612.2 bytes of data associated with addressing immediate addressing 632.2.1.2 632.2.1.1 632.2.1.3 implied directly addressing addressing addressing 642.2.1.5 642.2.1.4 register indirect addressing 652.2. 1.6 Indexed Addressing 662.2.2 with the jump address the addressing mode address 672.2.2.2 662.2.2.1 absolute relative jump jump jump address 672.2.2.3 index-bit data addressing 682.2.3 and related implicit bit addressing mode address 692.2.3.2 682.2.3.1 direct addressing mode bit addressing 692.2.4 correspondence with the address space of 692.3 80C51 instruction to achieve the classification according to functional classification 712.3.2 702.3.1 code word by section 712.3.3 by the number of execution cycles classification classification classification 712.3.5 712.3.4 by addressing mode operand by carrying signs category by impact category 712.3.6 722.3.7 by frequency of use category 722.4 80C51 732.4 command function classification analysis .1 data transfer instruction class instructions 782.4.3 732.4.2 arithmetic logic operation class class class instruction and jump instruction 832.4.4 862.4.5 bit-instruction instruction 902.5 80C51 942.6 80C51 internal laws of the application of skill instruction 952.6. 1 of 5 operating skills 952.6.2 952.6.3 Clear bit bit operating skills to take anti-962.6.4-bit operating skills test operating skills 972.7 CPU-SFR-module in the relationship between thinking and practice 98 99 Chapter 3 assembler design foundation and assembly language tool chain 3.1 Overview 1013.1.1 1013.1.2 background knowledge of assembly language format of the statement 1033.1.3 1073.1.4 program flow and the overall structure of the source file format written directive 1103.2.1 1073.2 symbolic name commonly used definition of pseudo-class memory initialization command 1103.2.2 1133.2.3 assembler pseudo-instruction class state control directive 1143.2.4 other 1153.3 class 4 basic program structure 1173.3.1 routine sequential program structure [3.1] 117 bytes split 1173.3.2 branching structure of 118 [3.2] numeric comparison routines 1183.3.3 loop structure of the program routines 120 [3.3] RAM 121 range fill 1203.3.4 subroutine structure [3.4] to select the routine extreme 1223.4 5 personalized design of utility method initializes the block design 1243.4.2 1233.4.1 delay programming routines 3.5] 124 [1253.4.3 look-up table programming software delay routine 126 [3.6] the factorial function 1273.4.4 129 [bulk transfer programming Table 3.7] jump instruction routine method routine 130 [3.8] address offset scale method 1313.4.5 Boolean programming routines 132 [3.9] 1333.5 combinational logic simulation software tool chain assembly language assembly language tool chain 1343.5 1343.5.1 .2 assembly language tool chain applications. for example routine 136 [3.10] 8-bit timer 1373.6 binary output file (LST and HEX) interpretation 1413.6.1 reading list file (. LST) 1413.6.2 interpretation of the final object file (. HEX) thinking and practice 144 143 Chapter 4 general-purpose parallel input and output ports and port pin 4.1 Overview 1464.2 1474.3 internal structure of the parallel port parallel port works 1484.3.1 1484.3.2 from the port pin output data input data from the port pin 1494.3.3 to read the contents of the port data latch operation instruction 1494.4 1494.5 parallel port parallel port of each personality differences 1504.5.1 P0 port 1504.5.2 P1 port 1514.5.3 P2 port 1514.5.4 P3 port parallel port features summary 1534.7 1524.6 parallel port features are open-drain application skills 1544.7.1 1544.7.2 Magical Magical weak pull output stage 1564.7.3 asymmetric thinking and practice the use of 157 158 Chapter 5 Timer counter timer counter module 5.1 basic purposes 1595.2 80C51 counter timers T0 and T1 in the characteristics of 1605.3 timer counter register T0 and T1 associated 1605.4 T0 and T1 module circuit structure and working principle of cumulative cycle count register 1635.4.2 1625.4.1 clock source selection circuit 1645.4. 3 clock source control circuit 1645.5 timer counter four modes 1655.5.1 Mode 1 (16-bit counter register) 1665.5.2 Mode 0 (13-bit count register) 1665.5.3 Mode 2 (8-bit auto-reload counter register) 1675.5.4 mode 3 (2 8-bit count register) thinking and practice 169 168 Chapter 6 6.1 interrupt interrupt interrupt logic and the concept of the basic concepts of 1716.2 80C51 interrupt source interrupt sources and interrupt logic 1736.2.1 1736.2 1736.2.2 interrupt logic .3 interrupt priority interrupt-related registers 1756.4 1746.3 interrupt handling 1776.4.1 1776.4.2 interrupt programming method interrupt response latency 1806.4.3 to note some of the thinking and practice 181 questions 180 Chapter 7 Serial Communication Theory and Serial communication interface 7.1 basic concept 1837.1.1 serial communication serial communication are two basic ways 1847.1.1.1 1847.1.1.2 asynchronous transfer mode transmission 1857.1.2 synchronous serial communication data transfer direction 1857.1.2.1 simplex transmission 1867.1.2.3 1857.1.2.2 half-duplex transmission mode full-duplex transmission 1867.1.3 serial communication control method 1867.1.3.2 1867.1.3.1 master was way 1867.1.4 serial communication controller pattern . encoding and frame structure 1877.1.5 serial communication error detection and error correction parity 1887.1.5.2 1887.1.5.1 1887.1.5.3 cumulative cyclic redundancy check and verify the correct communication CRC1887.1.5.4 wrong 1887.1.6 serial communication networking communication method 1907.1.6.2 1907.1.6.1 Dual multi-machine multi-master communication method 1917.1.6.3 1917.1.7 serial communication interface circuit and parameters 1927.1.8 serial communications transmission rate 1947.1.8.1 information transfer rate R1947.1.8.2 symbol transmission rate N1957.1.9 1957.2 80C51 serial communications protocol in the Universal Synchronous Asynchronous Receiver Transmitter USART module 1967.2.1 USART module associated registers 1987.2.2 USART module circuit structure 2007.2. 3 Baud Rate Generator 2017.2.4 USART module works 2047.2.4.1 way 1 - 10 duplex asynchronous frame structure - Dual way communication 2047.2.4.2 2 and 3 - asynchronous duplex frame structure 11 - - multi-machine communication 2057.2.4.3 way 0 - 8-bit half-duplex synchronous master data - multi-machine communication shift register 2067.2.5 2087.2.5.1 to achieve the principle of multi-machine communication wiring 2087.2.5.2 implementation of multi-machine communication communication method 2097.2.5.3 multi-machine multi-machine communication steps 2107.2.5.4 2117.2.6 UART communication protocol and interface design skills 2117.2.6.1 expansion method with multiple choice single-chip UART modules with software virtualization technology 2117.2 2117.2.6.2. 6.3 ASIC 212 use thinking and practice 212 Chapter 8 parallel bus. parallel bus interface and parallel expansion bus concept 2148.1.1 8.1 parallel bus data bus (DB) 2158.1.2 address bus (AB) 2158.1.3 control bus (CB ) 2158.2 2168.3 parallel bus interface parallel bus expansion 2178.3.1 extended program memory ROM2178.3.1.1 not advocate foreign expansion ROM reason 2178.3.1.2 2188.3.1.3 need to master the technology outside the extended ROM expansion outside of expansion of the wiring diagram 2188.3.1.4 ROM expansion outside of the signal timing 2198.3.1.5 2198.3.2 Extended ROM device type data memory RAM2218.3.2.1 external expansion RAM expansion outside of the device type 2218.3.2.2 2228.3.2.3 wiring diagram of the RAM expansion outside the RAM signal timing 2228.3. 3 extended use of parallel IO port 2238.3.3.1 2248.3.3.2 parallel bus expansion method to achieve expansion of the use of general purpose device using a dedicated device extends 2288.3.4 2258.3.3.3 to add a few shows thought and practice 228 228 Chapter 9 system reset source design and expansion of technology 9.1 MCU working condition and state transition 2309.2 reset source. reset and reset reset source 2319.2.2 2319.2.1 What is What are the specific contents of the reset operation reset state which 2329.2.3 2329.2.4 few additional instructions specific performance 2329.3 power-on reset (POR) and reset power-on reset timing delay 2339.3.1 2339.3.2 three kinds of power-on reset circuit 2349.3.3 power-on reset failure of two kinds of case studies 2.359.4 manual reset (MRST) and reset the circuit 2.379.4. 13 kinds of artificial reset manually reset timing circuit 2379.4.2 2379.5 Brown-out Reset (LVR). under-voltage detection (LVD) and voltage interrupt (LVI) 2389.5.1 2389.5.2 What is the power supply voltage drops fall will bring Brown-out Reset circuit with specific hazards 2399.5.3 build method 2399.5.4 discrete pieces of undervoltage detection threshold selection method 2409.5.5 voltage interrupt (LVI) design features a few additional instructions 2429.5.6 2439.6 80C51 voltage external expansion detection ASIC 2449.6.1 external voltage detector HT70xx2449.6.2 external voltage detector with delay with manual reset MAX8102459.6.3 external voltage detector MAX8122459.6.4 external power failure warning with voltage detector MAX7077082469.7 watchdog Reset (WDR) and watchdog timer (WDT) 2489.7.1 2489.7.2 equipped with the necessary procedures in place to control WDT causes. consequences and response 2499.7.2.1 actual MCU system control program causes 2499.7.2.2 actual MCU system process control procedures for the consequences of 2499.7.2.3 2499.7.2.4 control measures after the control response after follow-up response handling 2509.7.3 WDT circuit structure and working principle 2509.7.4 2519.8 80C51 shows how to add a few additional watchdog function 2529.8.1 equipped with software watchdog 2529.8.1.1 2529.8.1.2 software watchdog design software watchdog programming 2529.8.1.3 2539.8.2 outside the limitations of the software watchdog watchdog ASIC DS12322549.8.3 expansion outside expansion watchdog ASIC MAX8132559.9 3 kind of very extended way rules reset trap 2579.9.2 2569.9.1 what what software software reset (SWR) 2579.9.3 what software and hardware reset (SHR) 2599.9.4 What is illegal Address Reset (IAR) 2609.10 2619.11 Summary reset reset flag set and reset the flag application 2629.11.1 2629.11.2 reset flag set way of thinking and practice application methods 265 266 Chapter 10 system clock source and power supply design and power-saving technology designed 26710.1.1 10.1 system clock source outside the self-built clock source 26710.1.2 26810.1.3 clock oscillator clock source cited Principle of 26910.1.4 clock circuit design considerations 27310.2 27410.2.1 power system power supply design and access methods overall planning 27410.2.2 27610.2.3 regulated power supply circuit design features of the chip power pins and anti-jamming measures 28010.3 saving techniques (sleep and wake) 28110.3.1 saving technical background and conceptual background 28110.3.1.2 28110.3.1.1 support power-saving mode associated hardware 28210.3.1.3 register 28310.3.2 shutdown mode (PD) 28410.3.2.1 28410.3.2.2 shutdown mode to enter the exit shutdown mode (3 modes) 28510.3.3 standby mode (IDL) 28610.3.3.1 standby mode entry 28610.3.3.2 exit standby mode (3 modes) 28710.3.4 power-saving mode. the pin-saving arrangement thinking and practice 289 288 Chapter 11 on-chip program memory programming techniques and methods of protection of traditional parallel programming method 11.1 29111.1.1 29111.1.2 programming concepts and programming tools for chip programming logic 29211.1.3 80C51 series of program code p, paperback. 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Windows 2000Office 2000Word 2000Excel 2000PowerPoint 2000FrontPage 2000DOSDOSDOSDOS Contents : 1 1 31.1 31.1.1 31.1.2 51.1.3 51.1.4 71.2 71.2.1 71.2.2 91.2.3 BCD 111.2.4 ASCII 111.2.5 121.2.6 131.3 141.3.1 141.3.2 141.4 151.4.1 Moeher Board 151.4.2 CPU 161.4.3 161.4.4 /I/O 171.4.5 171.4.6 191.4.7 191.4.8 211.5 211.5.1 211.5.2 DOS 221.5.3 Windows 241.6 241.6.1 241.6.2 251.7 261.7.1 261.7.2 261.7.3 27 282 292.1 292.1.1 292.1.2 312.1.3 322.1.4 322.1.5 352.2 362.2.1 362.2.2 362.2.3 372.2.4 392.2.5 412.3 Internet 412.3.1 Internet 412.3.2 Internet 422.3.3 Internet 442.3.4 Internet 452.4 Internet 452.4.1 TCP/IP 452.4.2 IP 472.4.3 492.4.4 URL 522.5 Internet 532.5.1 542.5.2 ISDN 542.5.3 DDN 542.5.4 XDSL 552.5.5 Cable Modem 552.5.6 552.5.7 562.6 562.6.1 562.6.2 572.6.3 582.6.4 592.7 IntranetExtranet 592.7.1 Intranet 592.7.2 Extranet 602.7.3 612.8 622.8.1 622.8.2 632.8.3 64 653 673.1 673.1.1 673.1.2 693.1.3 703.2 713.2.1 713.2.2 743.2.3 773.3 783.3.1 783.3.2 793.3.3 803.4 823.4.1 823.4.2 833.4.3 833.4.4 853.5 903.5.1 Internet 903.5.2 913.5.3 91 922 4 954.1 954.1.1 954.1.2 974.2 984.2.1 984.2.2 984.2.3 ABC 1004.3 1014.3.1 1014.3.2 1034.3.3 1044.3.4 1074.3.5 108 1105 Windows 2000 1125.1 Windows 2000 1125.1.1 Windows 2000 1125.1.2 Windows 2000 1155.1.3 Windows 2000 1165.2 Windows 2000 1185.2.1 1185.2.2 1195.2.3 1225.3 Windows 2000 1255.3.1 1255.3.2 1275.3.3 1305.4 Windows 2000 1335.4.1 Windows 2000 1335.4.2 Windows 2000 1355.4.3 DOS 136 1426 Windows 2000 1436.1 1436.1.1 1436.1.2 1466.1.3 1476.2 1486.2.1 1486.2.2 Windows 1496.3 1516.3.1 1516.3.2 1526.4 1556.4.1 1556.4.2 1566.5 1586.5.1 1586.5.2 1596.6 1616.6.1 1616.6.2 163 1647 1657.1 1657.1.1 1657.1.2 1667.2 1687.2.1 1687.2.2 1697.3 1697.3.1 1697.3.2 1717.3.3 1727.4 1727.4.1 1727.4.2 CD 1757.4.3 1767.4.4 1777.5 1787.5.1 1797.5.2 1807.5.3 1827.5.4 182 1848 Windows 2000 1858.1 Internet 1858.1.1 Internet 1858.1.2 1868.1.3 Internet 1878.2 1888.2.1 Internet Explorer 1888.2.2 Internet Explorer 1898.2.3 Internet 1918.2.4 IE 1928.2.5 Web 1938.3 Outlook Express 1958.3.1 Outlook Express 1958.3.2 1968.3.3 1978.3.4 1988.4 1998.4.1 1998.4.2 2008.4.3 2018.4.4 Windows 2000 203 2043 9 Office 2000 2079.1 Office 2000 2079.1.1 2079.1.2 Office 2000 2099.2 Office 2000 2109.2.1 Office 2000 2109.2.2 Office 2000 2129.2.3 Office 2000 2149.3 2149.3.1 Office 2159.3.2 215 21610 Word 2000 21710.1 Word 2000 21710.1.1 Word 2000 21710.1.2 Word 2000 21810.1.3 Word 2000 21910.2 Word 22110.2.1 22110.2.2 22410.3 Word 22910.3.1 22910.3.2 23210.3.3 23810.3.4 24310.4 24810.4.1 24810.4.2 25410.4.3 25710.4.4 25810.5 25910.5.1 25910.5.2 26110.6 26310.6.1 26310.6.2 264 26711 Excel 2000 26811.1 Excel 2000 26811.1.1 Excel 2000 26811.1.2 26911.1.3 Excel 2000 26911.2 Excel 2000 27211.2.1 27211.2.2 27211.2.3 27311.2.4 27411.3 27511.3.1 27611.3.2 27711.4 27811.4.1 27811.4.2 27911.4.3 28111.4.4 28111.4.5 28211.4.6 28211.4.7 28211.5 Excel 28311.5.1 28311.5.2 28611.6 29011.6.1 29011.6.2 29011.6.3 29111.7 29411.7.1 29411.7.2 29511.7.3 29611.8 29611.8.1 29711.8.2 29711.8.3 29811.8.4 29911.9 30111.9.1 30111.9.2 30211.9.3 30211.9.4 303 30412 PowerPoint 2000 30612.1 PowerPoint 2000 30612.1.1 PowerPoint 2000 30612.1.2 30612.1.3 30712.2 30812.2.1 30812.2.2 31012.2.3 31012.2.4 31212.3 31312.3.1 31412.3.2 31512.3.3 31512.3.4 31612.4 31612.4.1 31612.4.2 31812.4.3 319 32213 FrontPage 2000 32413.1 FrontPage 2000 32413.1.1 32413.1.2 FrontPage 2000 32413.2 32713.2.1 32713.2.2 32713.3 32813.3.1 32813.3.2 32913.3.3 33013.3.4 33113.4 33213.4.1 33213.4.2 33413.5 33413.5.1 33413.5.2 33513.5.3 33613.6 FrontPage 33713.6.1 33713.6.2 33913.6.3 339 340 Satisfaction guaranteed,or money back.<
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[EAN: 9787115113450], Neubuch, Paperback. Pages Number: 341 Language: . Publisher: ; 1 (200411). Windows 2000Office 2000Word 2000Excel 2000PowerPoint 2000FrontPage 2000DOSDOSDOSDOS Conten… Mehr…
[EAN: 9787115113450], Neubuch, Paperback. Pages Number: 341 Language: . Publisher: ; 1 (200411). Windows 2000Office 2000Word 2000Excel 2000PowerPoint 2000FrontPage 2000DOSDOSDOSDOS Contents : 1 1 31.1 31.1.1 31.1.2 51.1.3 51.1.4 71.2 71.2.1 71.2.2 91.2.3 BCD 111.2.4 ASCII 111.2.5 121.2.6 131.3 141.3.1 141.3.2 141.4 151.4.1 Moeher Board 151.4.2 CPU 161.4.3 161.4.4 /I/O 171.4.5 171.4.6 191.4.7 191.4.8 211.5 211.5.1 211.5.2 DOS 221.5.3 Windows 241.6 241.6.1 241.6.2 251.7 261.7.1 261.7.2 261.7.3 27 282 292.1 292.1.1 292.1.2 31., Books<
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paperback. New. Ship out in 2 business day, And Fast shipping, Free Tracking number will be provided after the shipment.Pages Number: 348 Publisher: Beijing University of Aeronautics Pub. Date :2006-08-01 version 1. 8051 MCU is popular for many years on behalf of the international models. is the first choice of university teaching and Beginners mainstream models. also in a variety of technical journals and professional books in the highest frequency of the classic models. Book for teaching the standard 80C51 model. and an appropriate balance between the common and popular 8051 model features. Contents include: hardware architecture. ROM. RAM. instruction set. assembly language and assembler based tool chain. parallel ports. timers. interrupt logic. reset logic. clock circuits. power circuits and other features of the structure and working principle of the circuit. and on-chip program memory programming principles. Outstanding features: new ideas. easy to understand. language fluency. step by step. detailed content. the system comprehensive. learning to use both. results-oriented. experience coaching. resolving doubts and confusion. renewal. Suitable for the relevant professional specialist college students. undergraduate textbooks or reference books. can be used as scientific research. production and maintenance technician training book. Contents: Chapter 0 Introduction 0.1 Background knowledge and discipline necessary to learn what SCM SCM 10.2 What is the reason fascinating to learn microcontroller 30.3 50.4 What is the significance single-chip microcontroller in the end is what use 70.5 90.6 100.7 51 What are the characteristics MCU MCU What is the background of development 110.7.1 MCS-48 series MCU Introduction 110.7.2 MCS-51 series 51 series single-chip microcontroller Overview 110.7.3 Introduction 140.7.4 51 series 51 series of conventional naming 160.7.5 170.7 microcontroller programming method more .6 the performance characteristics of the standard 8051 170.8 51 computers to learn what are the advantages 180.8.1 180.8.2 advantage of information technology's advantages 190.8.3 hardware advantages 190.8.4 200.8.5 software advantage software tool chain advantages 200.8.6 hardware tool chain advantages 210.9 specialized terminology and technical terms 210.9.1 220.9.2 hardware jargon jargon 250.10 software book writing ideas and thinking and practice writing goals 26 28 1 Chapter Overview 1.1 hardware standard 80C51 chip core area within the overall structure of the 291.1.1 cell circuit and its functions 321.1.2 321.1.3 central processing unit and functional features and functionality 361.2 361.1.4 chip peripheral modules and the external package pins package 371.2.2 371.2.1 391.2.3 pin function pin function to simplify the organization of 421.4 401.3 memory program memory (ROM) 431.5 Data Memory (RAM) 451.5.1 451.5.2 external data memory space internal data memory space is 461.5. 3 The concept of stack stack 481.5.3.1 481.5.3.2 481.5.3.3 uses the stack stack stack operations structure 481.5.3.4 491.5.3.5 Notes 501.6 Special Function Register (SFR) space 501.6.1 SFR layout and configuration 511.6.2 Boolean function of 531.7 SFR processor (bit processor) 54 55 thinking and exercise instruction Chapter 2 Classification 80C51 2.1 80C51 instruction parsing instructions describe methods outlined 572.1.1 582.1.2 592.1.3 instruction execution sequence encoding instructions format addressing 622.2.1 612.2 bytes of data associated with addressing immediate addressing 632.2.1.2 632.2.1.1 632.2.1.3 implied directly addressing addressing addressing 642.2.1.5 642.2.1.4 register indirect addressing 652.2. 1.6 Indexed Addressing 662.2.2 with the jump address the addressing mode address 672.2.2.2 662.2.2.1 absolute relative jump jump jump address 672.2.2.3 index-bit data addressing 682.2.3 and related implicit bit addressing mode address 692.2.3.2 682.2.3.1 direct addressing mode bit addressing 692.2.4 correspondence with the address space of 692.3 80C51 instruction to achieve the classification according to functional classification 712.3.2 702.3.1 code word by section 712.3.3 by the number of execution cycles classification classification classification 712.3.5 712.3.4 by addressing mode operand by carrying signs category by impact category 712.3.6 722.3.7 by frequency of use category 722.4 80C51 732.4 command function classification analysis .1 data transfer instruction class instructions 782.4.3 732.4.2 arithmetic logic operation class class class instruction and jump instruction 832.4.4 862.4.5 bit-instruction instruction 902.5 80C51 942.6 80C51 internal laws of the application of skill instruction 952.6. 1 of 5 operating skills 952.6.2 952.6.3 Clear bit bit operating skills to take anti-962.6.4-bit operating skills test operating skills 972.7 CPU-SFR-module in the relationship between thinking and practice 98 99 Chapter 3 assembler design foundation and assembly language tool chain 3.1 Overview 1013.1.1 1013.1.2 background knowledge of assembly language format of the statement 1033.1.3 1073.1.4 program flow and the overall structure of the source file format written directive 1103.2.1 1073.2 symbolic name commonly used definition of pseudo-class memory initialization command 1103.2.2 1133.2.3 assembler pseudo-instruction class state control directive 1143.2.4 other 1153.3 class 4 basic program structure 1173.3.1 routine sequential program structure [3.1] 117 bytes split 1173.3.2 branching structure of 118 [3.2] numeric comparison routines 1183.3.3 loop structure of the program routines 120 [3.3] RAM 121 range fill 1203.3.4 subroutine structure [3.4] to select the routine extreme 1223.4 5 personalized design of utility method initializes the block design 1243.4.2 1233.4.1 delay programming routines 3.5] 124 [1253.4.3 look-up table programming software delay routine 126 [3.6] the factorial function 1273.4.4 129 [bulk transfer programming Table 3.7] jump instruction routine method routine 130 [3.8] address offset scale method 1313.4.5 Boolean programming routines 132 [3.9] 1333.5 combinational logic simulation software tool chain assembly language assembly language tool chain 1343.5 1343.5.1 .2 assembly language tool chain applications. for example routine 136 [3.10] 8-bit timer 1373.6 binary output file (LST and HEX) interpretation 1413.6.1 reading list file (. LST) 1413.6.2 interpretation of the final object file (. HEX) thinking and practice 144 143 Chapter 4 general-purpose parallel input and output ports and port pin 4.1 Overview 1464.2 1474.3 internal structure of the parallel port parallel port works 1484.3.1 1484.3.2 from the port pin output data input data from the port pin 1494.3.3 to read the contents of the port data latch operation instruction 1494.4 1494.5 parallel port parallel port of each personality differences 1504.5.1 P0 port 1504.5.2 P1 port 1514.5.3 P2 port 1514.5.4 P3 port parallel port features summary 1534.7 1524.6 parallel port features are open-drain application skills 1544.7.1 1544.7.2 Magical Magical weak pull output stage 1564.7.3 asymmetric thinking and practice the use of 157 158 Chapter 5 Timer counter timer counter module 5.1 basic purposes 1595.2 80C51 counter timers T0 and T1 in the characteristics of 1605.3 timer counter register T0 and T1 associated 1605.4 T0 and T1 module circuit structure and working principle of cumulative cycle count register 1635.4.2 1625.4.1 clock source selection circuit 1645.4. 3 clock source control circuit 1645.5 timer counter four modes 1655.5.1 Mode 1 (16-bit counter register) 1665.5.2 Mode 0 (13-bit count register) 1665.5.3 Mode 2 (8-bit auto-reload counter register) 1675.5.4 mode 3 (2 8-bit count register) thinking and practice 169 168 Chapter 6 6.1 interrupt interrupt interrupt logic and the concept of the basic concepts of 1716.2 80C51 interrupt source interrupt sources and interrupt logic 1736.2.1 1736.2 1736.2.2 interrupt logic .3 interrupt priority interrupt-related registers 1756.4 1746.3 interrupt handling 1776.4.1 1776.4.2 interrupt programming method interrupt response latency 1806.4.3 to note some of the thinking and practice 181 questions 180 Chapter 7 Serial Communication Theory and Serial communication interface 7.1 basic concept 1837.1.1 serial communication serial communication are two basic ways 1847.1.1.1 1847.1.1.2 asynchronous transfer mode transmission 1857.1.2 synchronous serial communication data transfer direction 1857.1.2.1 simplex transmission 1867.1.2.3 1857.1.2.2 half-duplex transmission mode full-duplex transmission 1867.1.3 serial communication control method 1867.1.3.2 1867.1.3.1 master was way 1867.1.4 serial communication controller pattern . encoding and frame structure 1877.1.5 serial communication error detection and error correction parity 1887.1.5.2 1887.1.5.1 1887.1.5.3 cumulative cyclic redundancy check and verify the correct communication CRC1887.1.5.4 wrong 1887.1.6 serial communication networking communication method 1907.1.6.2 1907.1.6.1 Dual multi-machine multi-master communication method 1917.1.6.3 1917.1.7 serial communication interface circuit and parameters 1927.1.8 serial communications transmission rate 1947.1.8.1 information transfer rate R1947.1.8.2 symbol transmission rate N1957.1.9 1957.2 80C51 serial communications protocol in the Universal Synchronous Asynchronous Receiver Transmitter USART module 1967.2.1 USART module associated registers 1987.2.2 USART module circuit structure 2007.2. 3 Baud Rate Generator 2017.2.4 USART module works 2047.2.4.1 way 1 - 10 duplex asynchronous frame structure - Dual way communication 2047.2.4.2 2 and 3 - asynchronous duplex frame structure 11 - - multi-machine communication 2057.2.4.3 way 0 - 8-bit half-duplex synchronous master data - multi-machine communication shift register 2067.2.5 2087.2.5.1 to achieve the principle of multi-machine communication wiring 2087.2.5.2 implementation of multi-machine communication communication method 2097.2.5.3 multi-machine multi-machine communication steps 2107.2.5.4 2117.2.6 UART communication protocol and interface design skills 2117.2.6.1 expansion method with multiple choice single-chip UART modules with software virtualization technology 2117.2 2117.2.6.2. 6.3 ASIC 212 use thinking and practice 212 Chapter 8 parallel bus. parallel bus interface and parallel expansion bus concept 2148.1.1 8.1 parallel bus data bus (DB) 2158.1.2 address bus (AB) 2158.1.3 control bus (CB ) 2158.2 2168.3 parallel bus interface parallel bus expansion 2178.3.1 extended program memory ROM2178.3.1.1 not advocate foreign expansion ROM reason 2178.3.1.2 2188.3.1.3 need to master the technology outside the extended ROM expansion outside of expansion of the wiring diagram 2188.3.1.4 ROM expansion outside of the signal timing 2198.3.1.5 2198.3.2 Extended ROM device type data memory RAM2218.3.2.1 external expansion RAM expansion outside of the device type 2218.3.2.2 2228.3.2.3 wiring diagram of the RAM expansion outside the RAM signal timing 2228.3. 3 extended use of parallel IO port 2238.3.3.1 2248.3.3.2 parallel bus expansion method to achieve expansion of the use of general purpose device using a dedicated device extends 2288.3.4 2258.3.3.3 to add a few shows thought and practice 228 228 Chapter 9 system reset source design and expansion of technology 9.1 MCU working condition and state transition 2309.2 reset source. reset and reset reset source 2319.2.2 2319.2.1 What is What are the specific contents of the reset operation reset state which 2329.2.3 2329.2.4 few additional instructions specific performance 2329.3 power-on reset (POR) and reset power-on reset timing delay 2339.3.1 2339.3.2 three kinds of power-on reset circuit 2349.3.3 power-on reset failure of two kinds of case studies 2.359.4 manual reset (MRST) and reset the circuit 2.379.4. 13 kinds of artificial reset manually reset timing circuit 2379.4.2 2379.5 Brown-out Reset (LVR). under-voltage detection (LVD) and voltage interrupt (LVI) 2389.5.1 2389.5.2 What is the power supply voltage drops fall will bring Brown-out Reset circuit with specific hazards 2399.5.3 build method 2399.5.4 discrete pieces of undervoltage detection threshold selection method 2409.5.5 voltage interrupt (LVI) design features a few additional instructions 2429.5.6 2439.6 80C51 voltage external expansion detection ASIC 2449.6.1 external voltage detector HT70xx2449.6.2 external voltage detector with delay with manual reset MAX8102459.6.3 external voltage detector MAX8122459.6.4 external power failure warning with voltage detector MAX7077082469.7 watchdog Reset (WDR) and watchdog timer (WDT) 2489.7.1 2489.7.2 equipped with the necessary procedures in place to control WDT causes. consequences and response 2499.7.2.1 actual MCU system control program causes 2499.7.2.2 actual MCU system process control procedures for the consequences of 2499.7.2.3 2499.7.2.4 control measures after the control response after follow-up response handling 2509.7.3 WDT circuit structure and working principle 2509.7.4 2519.8 80C51 shows how to add a few additional watchdog function 2529.8.1 equipped with software watchdog 2529.8.1.1 2529.8.1.2 software watchdog design software watchdog programming 2529.8.1.3 2539.8.2 outside the limitations of the software watchdog watchdog ASIC DS12322549.8.3 expansion outside expansion watchdog ASIC MAX8132559.9 3 kind of very extended way rules reset trap 2579.9.2 2569.9.1 what what software software reset (SWR) 2579.9.3 what software and hardware reset (SHR) 2599.9.4 What is illegal Address Reset (IAR) 2609.10 2619.11 Summary reset reset flag set and reset the flag application 2629.11.1 2629.11.2 reset flag set way of thinking and practice application methods 265 266 Chapter 10 system clock source and power supply design and power-saving technology designed 26710.1.1 10.1 system clock source outside the self-built clock source 26710.1.2 26810.1.3 clock oscillator clock source cited Principle of 26910.1.4 clock circuit design considerations 27310.2 27410.2.1 power system power supply design and access methods overall planning 27410.2.2 27610.2.3 regulated power supply circuit design features of the chip power pins and anti-jamming measures 28010.3 saving techniques (sleep and wake) 28110.3.1 saving technical background and conceptual background 28110.3.1.2 28110.3.1.1 support power-saving mode associated hardware 28210.3.1.3 register 28310.3.2 shutdown mode (PD) 28410.3.2.1 28410.3.2.2 shutdown mode to enter the exit shutdown mode (3 modes) 28510.3.3 standby mode (IDL) 28610.3.3.1 standby mode entry 28610.3.3.2 exit standby mode (3 modes) 28710.3.4 power-saving mode. the pin-saving arrangement thinking and practice 289 288 Chapter 11 on-chip program memory programming techniques and methods of protection of traditional parallel programming method 11.1 29111.1.1 29111.1.2 programming concepts and programming tools for chip programming logic 29211.1.3 80C51 series of program code p, paperback. New. Ship out in 2 business day, And Fast shipping, Free Tracking number will be provided after the shipment.Paperback. Pages Number: 341 Language: . Publisher: ; 1 (200411). Windows 2000Office 2000Word 2000Excel 2000PowerPoint 2000FrontPage 2000DOSDOSDOSDOS Contents : 1 1 31.1 31.1.1 31.1.2 51.1.3 51.1.4 71.2 71.2.1 71.2.2 91.2.3 BCD 111.2.4 ASCII 111.2.5 121.2.6 131.3 141.3.1 141.3.2 141.4 151.4.1 Moeher Board 151.4.2 CPU 161.4.3 161.4.4 /I/O 171.4.5 171.4.6 191.4.7 191.4.8 211.5 211.5.1 211.5.2 DOS 221.5.3 Windows 241.6 241.6.1 241.6.2 251.7 261.7.1 261.7.2 261.7.3 27 282 292.1 292.1.1 292.1.2 312.1.3 322.1.4 322.1.5 352.2 362.2.1 362.2.2 362.2.3 372.2.4 392.2.5 412.3 Internet 412.3.1 Internet 412.3.2 Internet 422.3.3 Internet 442.3.4 Internet 452.4 Internet 452.4.1 TCP/IP 452.4.2 IP 472.4.3 492.4.4 URL 522.5 Internet 532.5.1 542.5.2 ISDN 542.5.3 DDN 542.5.4 XDSL 552.5.5 Cable Modem 552.5.6 552.5.7 562.6 562.6.1 562.6.2 572.6.3 582.6.4 592.7 IntranetExtranet 592.7.1 Intranet 592.7.2 Extranet 602.7.3 612.8 622.8.1 622.8.2 632.8.3 64 653 673.1 673.1.1 673.1.2 693.1.3 703.2 713.2.1 713.2.2 743.2.3 773.3 783.3.1 783.3.2 793.3.3 803.4 823.4.1 823.4.2 833.4.3 833.4.4 853.5 903.5.1 Internet 903.5.2 913.5.3 91 922 4 954.1 954.1.1 954.1.2 974.2 984.2.1 984.2.2 984.2.3 ABC 1004.3 1014.3.1 1014.3.2 1034.3.3 1044.3.4 1074.3.5 108 1105 Windows 2000 1125.1 Windows 2000 1125.1.1 Windows 2000 1125.1.2 Windows 2000 1155.1.3 Windows 2000 1165.2 Windows 2000 1185.2.1 1185.2.2 1195.2.3 1225.3 Windows 2000 1255.3.1 1255.3.2 1275.3.3 1305.4 Windows 2000 1335.4.1 Windows 2000 1335.4.2 Windows 2000 1355.4.3 DOS 136 1426 Windows 2000 1436.1 1436.1.1 1436.1.2 1466.1.3 1476.2 1486.2.1 1486.2.2 Windows 1496.3 1516.3.1 1516.3.2 1526.4 1556.4.1 1556.4.2 1566.5 1586.5.1 1586.5.2 1596.6 1616.6.1 1616.6.2 163 1647 1657.1 1657.1.1 1657.1.2 1667.2 1687.2.1 1687.2.2 1697.3 1697.3.1 1697.3.2 1717.3.3 1727.4 1727.4.1 1727.4.2 CD 1757.4.3 1767.4.4 1777.5 1787.5.1 1797.5.2 1807.5.3 1827.5.4 182 1848 Windows 2000 1858.1 Internet 1858.1.1 Internet 1858.1.2 1868.1.3 Internet 1878.2 1888.2.1 Internet Explorer 1888.2.2 Internet Explorer 1898.2.3 Internet 1918.2.4 IE 1928.2.5 Web 1938.3 Outlook Express 1958.3.1 Outlook Express 1958.3.2 1968.3.3 1978.3.4 1988.4 1998.4.1 1998.4.2 2008.4.3 2018.4.4 Windows 2000 203 2043 9 Office 2000 2079.1 Office 2000 2079.1.1 2079.1.2 Office 2000 2099.2 Office 2000 2109.2.1 Office 2000 2109.2.2 Office 2000 2129.2.3 Office 2000 2149.3 2149.3.1 Office 2159.3.2 215 21610 Word 2000 21710.1 Word 2000 21710.1.1 Word 2000 21710.1.2 Word 2000 21810.1.3 Word 2000 21910.2 Word 22110.2.1 22110.2.2 22410.3 Word 22910.3.1 22910.3.2 23210.3.3 23810.3.4 24310.4 24810.4.1 24810.4.2 25410.4.3 25710.4.4 25810.5 25910.5.1 25910.5.2 26110.6 26310.6.1 26310.6.2 264 26711 Excel 2000 26811.1 Excel 2000 26811.1.1 Excel 2000 26811.1.2 26911.1.3 Excel 2000 26911.2 Excel 2000 27211.2.1 27211.2.2 27211.2.3 27311.2.4 27411.3 27511.3.1 27611.3.2 27711.4 27811.4.1 27811.4.2 27911.4.3 28111.4.4 28111.4.5 28211.4.6 28211.4.7 28211.5 Excel 28311.5.1 28311.5.2 28611.6 29011.6.1 29011.6.2 29011.6.3 29111.7 29411.7.1 29411.7.2 29511.7.3 29611.8 29611.8.1 29711.8.2 29711.8.3 29811.8.4 29911.9 30111.9.1 30111.9.2 30211.9.3 30211.9.4 303 30412 PowerPoint 2000 30612.1 PowerPoint 2000 30612.1.1 PowerPoint 2000 30612.1.2 30612.1.3 30712.2 30812.2.1 30812.2.2 31012.2.3 31012.2.4 31212.3 31312.3.1 31412.3.2 31512.3.3 31512.3.4 31612.4 31612.4.1 31612.4.2 31812.4.3 319 32213 FrontPage 2000 32413.1 FrontPage 2000 32413.1.1 32413.1.2 FrontPage 2000 32413.2 32713.2.1 32713.2.2 32713.3 32813.3.1 32813.3.2 32913.3.3 33013.3.4 33113.4 33213.4.1 33213.4.2 33413.5 33413.5.1 33413.5.2 33513.5.3 33613.6 FrontPage 33713.6.1 33713.6.2 33913.6.3 339 340 Satisfaction guaranteed,or money back.<
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[EAN: 9787115113450], Neubuch, Ship out in 2 business day, And Fast shipping, Free Tracking number will be provided after the shipment.Paperback. Pages Number: 341 Language: . Publisher: … Mehr…
[EAN: 9787115113450], Neubuch, Ship out in 2 business day, And Fast shipping, Free Tracking number will be provided after the shipment.Paperback. Pages Number: 341 Language: . Publisher: ; 1 (200411). Windows 2000Office 2000Word 2000Excel 2000PowerPoint 2000FrontPage 2000DOSDOSDOSDOS Contents : 1 1 31.1 31.1.1 31.1.2 51.1.3 51.1.4 71.2 71.2.1 71.2.2 91.2.3 BCD 111.2.4 ASCII 111.2.5 121.2.6 131.3 141.3.1 141.3.2 141.4 151.4.1 Moeher Board 151.4.2 CPU 161.4.3 161.4.4 /I/O 171.4.5 171.4.6 191.4.7 191.4.8 211.5 211.5.1 211.5.2 DOS 221.5.3 Windows 241.6 241.6.1 241.6.2 251.7 261.7.1 261.7.2 261.7.3 27 282 292.1 292.1.1 292.1.2 312.1.3 322.1.4 322.1.5 352.2 362.2.1 362.2.2 362.2.3 372.2.4 392.2.5 412.3 Internet 412.3.1 Internet 412.3.2 Internet 422.3.3 Internet 442.3.4 Internet 452.4 Internet 452.4.1 TCP/IP 452.4.2 IP 472.4.3 492.4.4 URL 522.5 Internet 532.5.1 542.5.2 ISDN 542.5.3 DDN 542.5.4 XDSL 552.5.5 Cable Modem 552.5.6 552.5.7 562.6 562.6.1 562.6.2 572.6.3 582.6.4 592.7 IntranetExtranet 592.7.1 Intranet 592.7.2 Extranet 602.7.3 612.8 622.8.1 622.8.2 632.8.3 64 653 673.1 673.1.1 673.1.2 693.1.3 703.2 713.2.1 713.2.2 743.2.3 773.3 783.3.1 783.3.2 793.3.3 803.4 823.4.1 823.4.2 833.4.3 833.4.4 853.5 903.5.1 Internet 903.5.2 913.5.3 91 922 4 954.1 954.1.1 954.1.2 974.2 984.2.1 984.2.2 984.2.3 ABC 1004.3 1014.3.1 1014.3.2 1034.3.3 1044.3.4 1074.3.5 108 1105 Windows 2000 1125.1 Windows 2000 1125.1.1 Windows 2000 1125.1.2 Windows 2000 1155.1.3 Windows 2000 1165.2 Windows 2000 1185.2.1 1185.2.2 1195.2.3 1225.3 Windows 2000 1255.3.1 1255.3.2 1275.3.3 1305.4 Windows 2000 1335.4.1 Windows 2000 1335.4.2 Windows 2000 1355.4.3 DOS 136 1426 Windows 2000 1436.1 1436.1.1 1436.1.2 1466.1.3 1476.2 1486.2.1 1486.2.2 Windows 1496.3 1516.3.1 1516.3.2 1526.4 1556.4.1 1556.4.2 1566.5 1586.5.1 1586.5.2 1596.6 1616.6.1 1616.6.2 163 1647 1657.1 1657.1.1 1657.1.2 1667.2 1687.2.1 1687.2.2 1697.3 1697.3.1 1697.3.2 1717.3.3 1727.4 1727.4.1 1727.4.2 CD 1757.4.3 1767.4.4 1777.5 1787.5.1 1797.5.2 1807.5.3 1827.5.4 182 1848 Windows 2000 1858.1 Internet 1858.1.1 Internet 1858.1.2 1868.1.3 Internet 1878.2 1888.2.1 Internet Explorer 1888.2.2 Internet Explorer 1898.2.3 Internet 1918.2.4 IE 1928.2.5 Web 1938.3 Outlook Express 1958.3.1 Outlook Express 1958.3.2 1968.3.3 1978.3.4 1988.4 1998.4.1 1998.4.2 2008.4.3 2018.4.4 Windows 2000 203 2043 9 Office 2000 2079.1 Office 2000 2079.1.1 2079.1.2 Office 2000 2099.2 Office 2000 2109.2.1 Office 2000 2109.2.2 Office 2000 2129.2.3 Office 2000 2149.3 2149.3.1 Office 2159.3.2 215 21610 Word 2000 21710.1 Word 2000 21710.1.1 Word 2000 21710.1.2 Word 2000 21810.1.3 Word 2000 21910.2 Word 22110.2.1 22110.2.2 22410.3 Word 22910.3.1 22910.3.2 23210.3.3 23810.3.4 24310.4 24810.4.1 24810.4.2 25410.4.3 25710.4.4 25810.5 25910.5.1 25910.5.2 26110.6 26310.6.1 26310.6.2 264 26711 Excel 2000 26811.1 Excel 2000 26811.1.1 Excel 2000 26811.1.2 26911.1.3 Excel 2000 26911.2 Excel 2000 27211.2.1 27211.2.2 27211.2.3 27311.2.4 27411.3 27511.3.1 27611.3.2 27711.4 27811.4.1 27811.4.2 27911.4.3 28111.4.4 28111.4.5 28211.4.6 28211.4.7 28211.5 Excel 28311.5.1 28311.5.2 28611.6 29011.6.1 29011.6.2 29011.6.3 29111.7 29411.7.1 29411.7.2 29511.7.3 29611.8 29611.8.1 29711.8.2 29711.8.3 29811.8.4 29911.9 30111.9.1 30111.9.2 30211.9.3 30211.9.4 303 30412 PowerPoint 2000 30612.1 PowerPoint 2000 30612.1.1 PowerPoint 2000 30612.1.2 30612.1.3 30712.2 30812.2.1 30812.2.2 31012.2.3 31012.2.4 31212.3 31312.3.1 31412.3.2 31512.3.3 31512.3.4 31612.4 31612.4.1 31612.4.2 31812.4.3 319 32213 FrontPage 2000 32413.1 FrontPage 2000 32413.1.1 32413.1.2 FrontPage 2000 32413.2 32713.2.1 32713.2.2 32713.3 32813.3.1 32813.3.2 32913.3.3 33013.3.4 33113.4 33213.4.1 33213.4.2 33413.5 33413.5.1 33413.5.2 33513.5.3 33613.6 FrontPage 33713.6.1 33713.6.2 33913.6.3 339 340Four Satisfaction guaranteed,or money back.<
2000
ISBN: 9787115113450
; 1 (200411). paperback. New. Ship out in 2 business day, And Fast shipping, Free Tracking number will be provided after the shipment.Paperback. Pages Number: 341 Language: . Publisher:… Mehr…
; 1 (200411). paperback. New. Ship out in 2 business day, And Fast shipping, Free Tracking number will be provided after the shipment.Paperback. Pages Number: 341 Language: . Publisher: ; 1 (200411). Windows 2000Office 2000Word 2000Excel 2000PowerPoint 2000FrontPage 2000DOSDOSDOSDOS Contents : 1 1 31.1 31.1.1 31.1.2 51.1.3 51.1.4 71.2 71.2.1 71.2.2 91.2.3 BCD 111.2.4 ASCII 111.2.5 121.2.6 131.3 141.3.1 141.3.2 141.4 151.4.1 Moeher Board 151.4.2 CPU 161.4.3 161.4.4 /I/O 171.4.5 171.4.6 191.4.7 191.4.8 211.5 211.5.1 211.5.2 DOS 221.5.3 Windows 241.6 241.6.1 241.6.2 251.7 261.7.1 261.7.2 261.7.3 27 282 292.1 292.1.1 292.1.2 31... Satisfaction guaranteed,or money back., ; 1 (200411), 6<
2000, ISBN: 7115113459
[EAN: 9787115113450], Neubuch, Paperback. Pages Number: 341 Language: . Publisher: ; 1 (200411). Windows 2000Office 2000Word 2000Excel 2000PowerPoint 2000FrontPage 2000DOSDOSDOSDOS Conten… Mehr…
[EAN: 9787115113450], Neubuch, Paperback. Pages Number: 341 Language: . Publisher: ; 1 (200411). Windows 2000Office 2000Word 2000Excel 2000PowerPoint 2000FrontPage 2000DOSDOSDOSDOS Contents : 1 1 31.1 31.1.1 31.1.2 51.1.3 51.1.4 71.2 71.2.1 71.2.2 91.2.3 BCD 111.2.4 ASCII 111.2.5 121.2.6 131.3 141.3.1 141.3.2 141.4 151.4.1 Moeher Board 151.4.2 CPU 161.4.3 161.4.4 /I/O 171.4.5 171.4.6 191.4.7 191.4.8 211.5 211.5.1 211.5.2 DOS 221.5.3 Windows 241.6 241.6.1 241.6.2 251.7 261.7.1 261.7.2 261.7.3 27 282 292.1 292.1.1 292.1.2 31., Books<
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Detailangaben zum Buch - [](Chinese Edition)
EAN (ISBN-13): 9787115113450
ISBN (ISBN-10): 7115113459
Taschenbuch
Erscheinungsjahr: 2043
Herausgeber: ; 1 (200411)
Buch in der Datenbank seit 2013-08-06T04:44:29+02:00 (Berlin)
Detailseite zuletzt geändert am 2021-06-17T08:08:26+02:00 (Berlin)
ISBN/EAN: 9787115113450
ISBN - alternative Schreibweisen:
7-115-11345-9, 978-7-115-11345-0
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