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Techniques to Mitigate the Effects of Congenital Faults in Processors - This Book Covers a Wide Set of Faults in Modern Processors with Possible Remedies. Fault Types Include RTL Bugs and Faults due to Process Variation - Sarangi, Smruti / Torrellas, Josep
Vergriffenes Buch, derzeit bei uns nicht verfügbar.
(*)
Sarangi, Smruti / Torrellas, Josep:
Techniques to Mitigate the Effects of Congenital Faults in Processors - This Book Covers a Wide Set of Faults in Modern Processors with Possible Remedies. Fault Types Include RTL Bugs and Faults due to Process Variation - Taschenbuch

2008, ISBN: 9783639046373

[ED: Taschenbuch / Paperback], [PU: VDM Verlag Dr. Müller], It is getting increasingly difficult to verify processors and guarantee subsequent reliable operation. The complexity of processors is rapidly increasing with every new generation, leading to an increase in the number of design defects, ie. logical bugs in RTL. Simultaneously, with every new generation, process variations are making it tougher to ensure timing closure, leading to an increased susceptibility to timing faults. In this thesis we characterize and propose solutions to mitigate the effects of such congenital faults. We characterize RTL defects for 10 state of the art processors. Subsequently, we find common patterns and design an architecture to avoid such faults from manifesting. The process of testing for such defects is compounded by the fact that we have non-determinism in modern processors. We propose an architecture, CADRE, to remove most sources of non-determinism, and to allow of deterministic replay of faults. To redress the problem of process variation we propose a model of how parameter variation affects timing errors. We design a fuzzy logic based architecture that tries to maximize performance in the face of timing errors due to process variation., DE, [SC: 0.00], Neuware, gewerbliches Angebot, 220 mm, 160, [GW: 220g], Selbstabholung und Barzahlung, PayPal, offene Rechnung, Banküberweisung, Interntationaler Versand

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Techniques to Mitigate the Effects of Congenital Faults in Processors - This Book Covers a Wide Set of Faults in Modern Processors with Possible Remedies. Fault Types Include RTL Bugs and Faults due to Process Variation - Sarangi, Smruti / Torrellas, Josep
Vergriffenes Buch, derzeit bei uns nicht verfügbar.
(*)
Sarangi, Smruti / Torrellas, Josep:
Techniques to Mitigate the Effects of Congenital Faults in Processors - This Book Covers a Wide Set of Faults in Modern Processors with Possible Remedies. Fault Types Include RTL Bugs and Faults due to Process Variation - Taschenbuch

2008, ISBN: 9783639046373

[ED: Taschenbuch / Paperback], [PU: VDM Verlag Dr. Müller], It is getting increasingly difficult to verify processors and guarantee subsequent reliable operation. The complexity of processors is rapidly increasing with every new generation, leading to an increase in the number of design defects, ie. logical bugs in RTL. Simultaneously, with every new generation, process variations are making it tougher to ensure timing closure, leading to an increased susceptibility to timing faults. In this thesis we characterize and propose solutions to mitigate the effects of such congenital faults. We characterize RTL defects for 10 state of the art processors. Subsequently, we find common patterns and design an architecture to avoid such faults from manifesting. The process of testing for such defects is compounded by the fact that we have non-determinism in modern processors. We propose an architecture, CADRE, to remove most sources of non-determinism, and to allow of deterministic replay of faults. To redress the problem of process variation we propose a model of how parameter variation affects timing errors. We design a fuzzy logic based architecture that tries to maximize performance in the face of timing errors due to process variation., DE, [SC: 0.00], Neuware, gewerbliches Angebot, 220 mm, 160, [GW: 220g], Selbstabholung und Barzahlung, PayPal, offene Rechnung, Banküberweisung, Internationaler Versand

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Techniques to Mitigate the Effects of Congenital Faults in Processors - Smruti Sarangi
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Smruti Sarangi:
Techniques to Mitigate the Effects of Congenital Faults in Processors - Taschenbuch

ISBN: 9783639046373

[ED: Taschenbuch], [PU: VDM Verlag Dr. Müller e.K.], Neuware - It is getting increasingly difficult to verify processors and guarantee subsequent reliable operation. The complexity of processors is rapidly increasing with every new generation, leading to an increase in the number of design defects, ie. logical bugs in RTL. Simultaneously, with every new generation, process variations are making it tougher to ensure timing closure, leading to an increased susceptibility to timing faults. In this thesis we characterize and propose solutions to mitigate the effects of such congenital faults. We characterize RTL defects for 10 state of the art processors. Subsequently, we find common patterns and design an architecture to avoid such faults from manifesting. The process of testing for such defects is compounded by the fact that we have non-determinism in modern processors. We propose an architecture, CADRE, to remove most sources of non-determinism, and to allow of deterministic replay of faults. To redress the problem of process variation we propose a model of how parameter variation affects timing errors. We design a fuzzy logic based architecture that tries to maximize performance in the face of timing errors due to process variation. - - Besorgungstitel - vorauss. Lieferzeit 3-5 Tage., [SC: 0.00], Neuware, gewerbliches Angebot, 220x150x10 mm, [GW: 255g]

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(*) Derzeit vergriffen bedeutet, dass dieser Titel momentan auf keiner der angeschlossenen Plattform verfügbar ist.
Techniques to Mitigate the Effects of Congenital Faults in Processors - Smruti Sarangi
Vergriffenes Buch, derzeit bei uns nicht verfügbar.
(*)
Smruti Sarangi:
Techniques to Mitigate the Effects of Congenital Faults in Processors - Taschenbuch

ISBN: 9783639046373

[ED: Taschenbuch], [PU: VDM Verlag Dr. Müller e.K.], Neuware - It is getting increasingly difficult to verify processors and guarantee subsequent reliable operation. The complexity of processors is rapidly increasing with every new generation, leading to an increase in the number of design defects, ie. logical bugs in RTL. Simultaneously, with every new generation, process variations are making it tougher to ensure timing closure, leading to an increased susceptibility to timing faults. In this thesis we characterize and propose solutions to mitigate the effects of such congenital faults. We characterize RTL defects for 10 state of the art processors. Subsequently, we find common patterns and design an architecture to avoid such faults from manifesting. The process of testing for such defects is compounded by the fact that we have non-determinism in modern processors. We propose an architecture, CADRE, to remove most sources of non-determinism, and to allow of deterministic replay of faults. To redress the problem of process variation we propose a model of how parameter variation affects timing errors. We design a fuzzy logic based architecture that tries to maximize performance in the face of timing errors due to process variation., [SC: 0.00], Neuware, gewerbliches Angebot, 220x150x10 mm, [GW: 255g]

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Techniques to Mitigate the Effects of Congenital Faults in Processors - Smruti Sarangi
Vergriffenes Buch, derzeit bei uns nicht verfügbar.
(*)
Smruti Sarangi:
Techniques to Mitigate the Effects of Congenital Faults in Processors - Taschenbuch

ISBN: 9783639046373

[ED: Taschenbuch], [PU: VDM Verlag Dr. Müller e.K.], Neuware - It is getting increasingly difficult to verify processors and guarantee subsequent reliable operation. The complexity of processors is rapidly increasing with every new generation, leading to an increase in the number of design defects, ie. logical bugs in RTL. Simultaneously, with every new generation, process variations are making it tougher to ensure timing closure, leading to an increased susceptibility to timing faults. In this thesis we characterize and propose solutions to mitigate the effects of such congenital faults. We characterize RTL defects for 10 state of the art processors. Subsequently, we find common patterns and design an architecture to avoid such faults from manifesting. The process of testing for such defects is compounded by the fact that we have non-determinism in modern processors. We propose an architecture, CADRE, to remove most sources of non-determinism, and to allow of deterministic replay of faults. To redress the problem of process variation we propose a model of how parameter variation affects timing errors. We design a fuzzy logic based architecture that tries to maximize performance in the face of timing errors due to process variation., [SC: 0.00], Neuware, gewerbliches Angebot, 220x150x10 mm, [GW: 255g]

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Details zum Buch
Techniques to Mitigate the Effects of Congenital Faults in Processors

It is getting increasingly difficult to verify processors and guarantee subsequent reliable operation. The complexity of processors is rapidly increasing with every new generation, leading to an increase in the number of design defects, ie. logical bugs in RTL. Simultaneously, with every new generation, process variations are making it tougher to ensure timing closure, leading to an increased susceptibility to timing faults. In this thesis we characterize and propose solutions to mitigate the effects of such congenital faults. We characterize RTL defects for 10 state of the art processors. Subsequently, we find common patterns and design an architecture to avoid such faults from manifesting. The process of testing for such defects is compounded by the fact that we have non-determinism in modern processors. We propose an architecture, CADRE, to remove most sources of non-determinism, and to allow of deterministic replay of faults. To redress the problem of process variation we propose a model of how parameter variation affects timing errors. We design a fuzzy logic based architecture that tries to maximize performance in the face of timing errors due to process variation.

Detailangaben zum Buch - Techniques to Mitigate the Effects of Congenital Faults in Processors


EAN (ISBN-13): 9783639046373
ISBN (ISBN-10): 3639046374
Taschenbuch
Erscheinungsjahr: 2008
Herausgeber: VDM Verlag
160 Seiten
Gewicht: 0,255 kg
Sprache: eng/Englisch

Buch in der Datenbank seit 24.01.2009 13:22:02
Buch zuletzt gefunden am 21.11.2017 17:33:04
ISBN/EAN: 9783639046373

ISBN - alternative Schreibweisen:
3-639-04637-4, 978-3-639-04637-3


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